Current Issue : January - March Volume : 2014 Issue Number : 1 Articles : 7 Articles
Dynamic logic is a well-known logic style which is widely used in digital electronics. A mixed dynamic/static full adder cell is\r\npresented in this paper with the aimof reaching high efficiency.Themidoutputs are obtained fromaMulti-output dynamic module.\r\nThen, a multiplexer generates final outputs in the static part. Several conventional and state-of-the-art dynamic adders are also\r\nsurveyed and compared in the paper. All circuits are simulated by HSPICE with 32 nm CNFET technology. The proposed design\r\nis the fastest dynamic adder cell. In addition, it has approximately 5% higher efficiency in terms of PDP than the second most\r\nhigh-performance cell, which is DDCVS....
A nontrivial phase noise analysis method is proposed for frequency synthesizer of a passive millimeter-wave synthetic aperture\r\ninterferometric radiometer (SAIR) imager for concealed weapon detections on human bodies with high imaging rates. The\r\nfrequency synthesizer provides local oscillator signals for both millimeter-wave front ends and intermediate frequency IQ\r\ndemodulators for the SAIR system. The influence of synthesizer phase noise in different offset frequency ranges on the visibility\r\nphase errors has been systematically investigated with noise requirements drawn, and the integrated RMS phase error could\r\nrepresent uncorrelated phase noise effects in the most critical offset frequency range for visibility error control. An analytical phase\r\nnoise simulation method is proposed to guide synthesizer design. To conclude, the phase noise effects on SAIR visibility errors have\r\nbeen concretized to noise design requirements, and good agreements have been observed between simulation and measurement\r\nresults. The frequency synthesizer designed has been successfully in operation in BHU-2D-U system....
The Optoelectronic Oscillator (OEO) was first demonstrated in 1996 as a low phase noise RF source. Low phase noise RF sources\r\nhave uses for multiple applications, ranging from analog to digital converters to radar to metrology. In the past sixteen years, the\r\nOEO has been shown to be useful for other signal processing applications. This paper will provide a background of the OEO�s\r\nprinciples of operation, as well as multiple examples of signal processing applications where the OEO can be used.The OEO can\r\nbe applied to both analog and digital problems, providing new techniques to solve these challenges....
Differential Voltage Current Controlled Current Feedback Operational Amplifier is an attractive active element for realizing\r\nresistorless filters with a minimum active component count. This is verified through a design example, where a 3rd-order leapfrog\r\nfilter has been realized using the AMS 0.35 ??m CMOS process design kit. The performance of the Differential Voltage Current\r\nControlled Current Feedback Operational Amplifier filter is evaluated and compared with that obtained by the corresponding\r\nfilter, where Differential Voltage Current Controlled Current Conveyors have been employed....
A novel complex filter topology realized using current feedback operational amplifiers as active elements is introduced in this paper.\r\nOffered benefits are the low-voltage operation capability and the requirement for employing only grounded passive elements. Two\r\napplication examples are provided, where the frequency behavior of the derived filters fulfills the ZigBee and Bluetooth standards,\r\nrespectively. Their performance evaluation has been done through simulation results at postlayout level, using MOS transistor\r\nmodels provided by AMS C35B4 CMOS process....
A low complexity dual-mode pulse-triggered FF design for wireless baseband processing is presented in this paper. It supports both\r\nsingle-edge- and double-edge-triggered operations subject to a mode select control. Due to the novelty in pulse generator design,\r\nthe layout area overhead is only 8% when compared with other single-mode counterpart design. Postlayout simulations in TSMC\r\n1P6M 0.18 ??m CMOS process model also indicate that the proposed design is as efficient as its single-mode counterpart in various\r\nperformance metrics....
The study of barrier height control and optimization for Schottky barrier diode (SBD) from its physical parameters have been\r\nintroduced using particle swarm optimization (PSO) algorithm. SBD is the rectifying barrier for electrical conduction across\r\nthe metal semiconductor (MS) junction and, therefore, is of vital importance to the successful operation of any semiconductor\r\ndevice. 4H-SiC is used as a semiconductor material for its good electrical characteristics with high-power semiconductor devices\r\napplications. Six physical parameters are considered during the optimization process, that is, device metal, mobile charge density,\r\nfixed oxide charge density, interface trapped charge density, oxide thickness, and voltage drop across the metal-semiconductor\r\ncontact. The optimization process was performed using a MATLAB program. The results show that the SBD barrier height has\r\nbeen optimized to achieve a maximum or minimum barrier height across the contact, in addition to the ability of controlling the\r\nphysical parameters to adjust the device barrier height....
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